A New Timing-Driven Placement Algorithm Based on Table-Lookup Delay Model |
| |
Authors: | YU Hong HONG Xian-long YAO Bo CAI Yi-ci |
| |
Affiliation: | Department of Computer Science and Technology, Tsinghua University, Beijing 100084, China |
| |
Abstract: | An algorithm is presented for obtaining placements of cell-based very large scale integrated circuits, subject to timing constraints based on table-lookup model. A new timing delay model based on some delay tables of fabricators is first simplified and deduced; then it is formulated as a constrained programming problem using the new timing delay model. The approach combines the well-known quadratic placement with bottom-up clustering, as well as the slicing partitioning strategy, which has been tested on a set of sample circuits from industry and the results obtained show that it is very promising. |
| |
Keywords: | table-lookup timing clustering quadratic placement |
本文献已被 万方数据 等数据库收录! |
| 点击此处可从《半导体学报》浏览原始摘要信息 |
|
点击此处可从《半导体学报》下载全文 |
|