| 一种高速高精度采样/保持电路 |
| |
| 引用本文： | 杨斌,殷秀梅,杨华中.一种高速高精度采样/保持电路[J].半导体学报,2007,28(10):1642-1646. |
| |
| 作者姓名： | 杨斌 殷秀梅 杨华中 |
| |
| 作者单位： | 清华大学电子工程系，北京 100084;清华大学电子工程系，北京 100084;清华大学电子工程系，北京 100084 |
| |
| 摘 要： | 介绍了一种用于12bit,100MS/s流水线模数转换器前端的采样/保持电路的设计.该电路在3V电源电压100MHz采样频率时,输入直到奈奎斯特频率仍能够达到108dB的无杂散动态范围(SFDR)和77dB的信躁比(SNR).论文建立了考虑开关之后的采样保持电路的分析模型,并详细研究了电路中开关组合对电路性能的影响,同时发现了传统的栅源自举开关(bootstrapped switch)中存在的漏电现象并对其进行了改进,极大地减小了漏电并提高了电路的线性性能.
|
| 关 键 词： | 采样/保持电路 自举开关 增益自举放大器 |
| 文章编号： | 0253-4177（2007）10-1642-05 |
| 收稿时间： | 3/14/2007 9:02:35 PM |
| 修稿时间： | 4/29/2007 9:32:25 AM |
A High-Speed High-Resolution Sample-and-Hold Circuit |
| |
| Yang Bin,Yin Xiumei and Yang Huazhong.A High-Speed High-Resolution Sample-and-Hold Circuit[J].Chinese Journal of Semiconductors,2007,28(10):1642-1646. |
| |
| Authors: | Yang Bin Yin Xiumei and Yang Huazhong |
| |
| Affiliation: | Department of Electronic Engineering, Tsinghua University,Beijing 100084, China;Department of Electronic Engineering, Tsinghua University,Beijing 100084, China;Department of Electronic Engineering, Tsinghua University,Beijing 100084, China |
| |
| Abstract: | A high performance CMOS sample and hold(S/H)circuit for use in the front end of a 12bit 100MS/s ADC is presented.It achieves a 108dB spurious-free dynamic range and 77dB signal-to-noise ratio over the Nyquist band at a 100MHz sampling frequency with a 3V power supply.An analysis model for the S/H circuit is built to capture the switching effect.The impact of the switches' arrangement is also addressed.The leakage in a conventional bootstrapped switch is analyzed and some improvements are made,enhancing the linearity significantly. |
| |
| Keywords: | sample-and-hold circuit bootstrapped switch gain-boosting operational amplifier |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
| 点击此处可从《半导体学报》浏览原始摘要信息 |
|
点击此处可从《半导体学报》下载全文 |
