| 面向高速应用的10位2GHz数模转换器 |
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| 引用本文： | 袁凌,倪卫宁,石寅.面向高速应用的10位2GHz数模转换器[J].半导体学报,2007,28(10):1540-1545. |
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| 作者姓名： | 袁凌 倪卫宁 石寅 |
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| 作者单位： | 中国科学院半导体研究所,北京,100083;中国科学院半导体研究所,北京,100083;中国科学院半导体研究所,北京,100083 |
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| 摘 要： | 提出了一个刷新率达2GHz的10位电流驱动型数模转换器.在综合了精度与芯片面积等因素之后,该数模转换器使用6 4结构.采用电流型逻辑以提高转换器的速度,并采用Q2 random walk方法设计了一个双中心对称的电流矩阵,确保数模转换器的线性度.该数模转换器核心版图面积为2.2mm×2.2mm,在3.3V单电压供电的情况下,该芯片功耗为790mW.
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| 关 键 词： | 数模转换器 电流驱动型 CMOS集成电路 Q2 random walk |
| 文章编号： | 0253-4177（2007）10-1540-06 |
| 收稿时间： | 3/12/2007 3:20:50 PM |
| 修稿时间： | 5/8/2007 10:58:50 AM |
A 10bit 2GHz CMOS D/A Converter for High-Speed System Applications |
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| Yuan Ling,Ni Weining and Shi Yin.A 10bit 2GHz CMOS D/A Converter for High-Speed System Applications[J].Chinese Journal of Semiconductors,2007,28(10):1540-1545. |
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| Authors: | Yuan Ling Ni Weining and Shi Yin |
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| Affiliation: | Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China;Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China;Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China |
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| Abstract: | This paper presents a 2GS/s 10bit CMOS digital-to-analog converter (DAC) that consists of two unit current-cell matrixes for 6MSBs and 4LSBs,respectively,trading off between the precision and size of the chip.Current mode logic (CML) is used to ensure high speed,and a double centro-symmetric current matrix is designed by the Q2 random walk strategy in order to ensure the linearity of the DAC.The DAC occupies 2.2mm×2.2mm of die area and consumes 790mW with a single 3.3V power supply. |
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| Keywords: | D/A converter current steering CMOS mixed integrated circuit Q2 random walk |
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