| 基于FPGA实现根升余弦滤波器的研究 |
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| 引用本文： | 张会生,王效洪,耿光辉. 基于FPGA实现根升余弦滤波器的研究[J]. 无线通信技术, 2005, 14(2): 46-49 |
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| 作者姓名： | 张会生 王效洪 耿光辉 |
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| 作者单位： | 西北工业大学电子信息学院,西安,710072 |
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| 摘 要： | 本文研究了数字通信系统中发送端的根升余弦滚降滤波器的原理和多相结构,分析讨论了该滤波器基于分布式算法(DA)和CSD编码的FPGA设计,并用ALTERA公司的FP-GA芯片进行了验证,最后给出了结果比较和分析。本文对基于FPGA的无线通信modem的设计有重要意义。
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| 关 键 词： | 根升余弦滤波器 FPGA 分布式算法CSD编码 IP核 |
| 文章编号： | 1003-8329(2005)02-0046-04 |
| 修稿时间： | 2004-11-17 |
Research on Root Raised Cosine Filter Implementation Based on FPGA |
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| Zhang Hui-sheng,WANG Xiao-hong,GENG Guang-hui. Research on Root Raised Cosine Filter Implementation Based on FPGA[J]. Wireless Communication Technology, 2005, 14(2): 46-49 |
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| Authors: | Zhang Hui-sheng WANG Xiao-hong GENG Guang-hui |
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| Abstract: | This paper researched on the theory and polyphase structure of the transmission root raised cosine filter in the digital communication system. The FPGA implementation of this filter based on distributed arithmetic is analyzed and discussed. An experimentation has been made using ALTERA's FPGA chip. At last, the result comparison and analyzation was given. This paper is very meaningful for the wireless modem design based on FPGA. |
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| Keywords: | root raised cosine filter FPGA distributed arithmetic CSD code IP core |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
