Stress control for overlay registration in a‐Si:H TFTs on flexible organic‐polymer‐foil substrates

Abstract— Mechanical stress in hydrogenated amorphous‐silicon (a‐Si:H) thin‐film transistors (TFTs) is becoming an important design parameter, especially when the TFTs are made on compliant substrates. Excessive stress always has been avoided to prevent film fracture and peeling. Now, attention is turning to the effects of stress on the TFT backplane dimensions and hence on the overlay alignment. The goal is to keep the size of the circuit‐on‐substrate composite structure the same at successive critical photolithographic steps. This is done most easily by keeping the structure flat. We show that a compensating stress can be dialed into the silicon nitride SiN_x) gate dielectric to also keep the substrate size constant. Varying the stress in the SiN_x gate dielectric did not significantly change the as‐fabricated TFT characteristics.