| 基于FPGA的时延测试方法研究 |
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| 引用本文： | 刘明波,佘瑨,周峰.基于FPGA的时延测试方法研究[J].国外电子测量技术,2011,30(7):59-61. |
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| 作者姓名： | 刘明波 佘瑨 周峰 |
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| 作者单位： | 中国卫星海上测控部,江阴,214431 |
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| 摘 要： | 时延性能是信息传输系统中的一项重要指标,时延以及时延抖动等性能会直接影响传输系统的性能.介绍了几种基于FPGA的时延测试方法,对比了各种测试方法的特点,并运用VHDL语言,实现了其中的"脉冲沿"时延测试方法;利用Al-tera SignalTap技术,对脉冲式时延测试方法进行了验证.测试表明,系统占用资源少,工作稳定可...
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| 关 键 词： | 时延测试 可编程逻辑阵列 脉冲 |
The research of time-delay test methods based on FPGA |
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| Liu Mingbo,She Jin,Zhou Feng.The research of time-delay test methods based on FPGA[J].Foreign Electronic Measurement Technology,2011,30(7):59-61. |
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| Authors: | Liu Mingbo She Jin Zhou Feng |
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| Affiliation: | Liu Mingbo She Jin Zhou Feng(China Satellite Maritime Tracking and Commanding ministry,Jiangyin 214431,China) |
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| Abstract: | Time-delay is an important capability of information transferring system,which will directly affect the transmission performance of the system.Some time-delay test methods based on FPGA are introduced and are compared,then VHDL is used to achieve the’pulse edge’time-delay test method.Altera SignalTap technology is used to verify this method.The test shows that the system takes up less resources and runs stably,which meets the design requirements. |
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| Keywords: | time-delay testing FPGA pulse |
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