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雷达信标源中频处理模块的设计与实现
引用本文:薛明,焦光龙,陈小雷.雷达信标源中频处理模块的设计与实现[J].无线电工程,2011,41(1):51-53.
作者姓名:薛明  焦光龙  陈小雷
作者单位:空军工程大学,导弹学院,陕西,三原,713800
摘    要:介绍了雷达信标源的结构组成及功能,提出了中频信号处理模块的总体设计方案,并对中频信号处理部分的距离延时和多普勒移频2个核心模块进行了FPGA的硬件设计和实现。时延模块采用了QuartusⅡ软件的原理图法进行设计,移频调制模块基于DSP Builder工具平台进行设计。仿真测试结果表明,设计实现的中频信号处理模块方案原理正确,达到了设计的要求。

关 键 词:雷达信标源  距离延时  多普勒频移  FPGA

Design and Realization of Intermediate Frequency Signal Processing Module of Radar Beacon
XUE Ming,JIAO Guang-long,CHEN Xiao-lei.Design and Realization of Intermediate Frequency Signal Processing Module of Radar Beacon[J].Radio Engineering of China,2011,41(1):51-53.
Authors:XUE Ming  JIAO Guang-long  CHEN Xiao-lei
Affiliation:XUE Ming,JIAO Guang-long,CHEN Xiao-lei(Missile Institute,Air Force Engineering University,Sanyuan Shaanxi 713800,China)
Abstract:The paper introduces the composition and functions of radar beacon,puts forward overall design scheme of the intermediate frequency signal processing module.It designs and implements such two core modules as distance delay module and Doppler frequency-shift module based on FPGA.The distance time-delay module is designed by using schematic diagram of QuartusⅡ,and the frequency-shift modulation module is designed based on DSP Builder.The simulation results show that the design scheme of the intermediate frequency signal processing module is perfect and meets the design requirements.
Keywords:radar beacon  distance delay  Doppler frequency-shift  FPGA  
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