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| 基于FPGA和多DSP的并行信号处理系统的实现 | |
| 引用本文： | 潘昉晟,赵峰,奚军,骆意.基于FPGA和多DSP的并行信号处理系统的实现[J].计算机工程,2006,32(23):247-249. |
| 作者姓名： | 潘昉晟 赵峰 奚军 骆意 |
| 作者单位： | 1. 上海交通大学微电子学院,上海 200030;华东计算技术研究所,上海 200233 2. 上海交通大学微电子学院,上海 200030 3. 华东计算技术研究所,上海 200233 |
| 摘 要： | 为了克服在高速实时信号处理领域中传统单DSP系统处理能力的瓶颈，多DSP并行处理技术应运而生，成为当前该领域研究的热点。该文提出了一种基于FPGA内部的软FIFO互连结构和4片TI公司的高性能浮点型DSP——TMS320C6701构成的多个DSP之间通信的并行信号处理系统。 |
| 关 键 词： | 并行处理 FPGA 多DSP |
| 文章编号： | 1000-3428（2006）23-0247-03 |
| 收稿时间： | 01 7 2006 12:00AM |
| 修稿时间： | 2006-01-07 |
Implementation of Parallel Signal Processing System Based on FPGA and Multi-DSP |
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| PAN Fangsheng,ZHAO Feng,XI Jun,LUO Yi.Implementation of Parallel Signal Processing System Based on FPGA and Multi-DSP[J].Computer Engineering,2006,32(23):247-249. | |
| Authors: | PAN Fangsheng ZHAO Feng XI Jun LUO Yi |
| Affiliation: | 1. School of Micro-electronic, Shanghai Jiaotong University, Shanghai 200030; 2. East China Institute of Computing Technology, Shanghai 200233 |
| Abstract: | In the field of high-speed real-time signal processing, the conventional single-chip system can hardly achieve goals due to poor processing ability. Therefore, multiple-processor parallel signal processing system turns to be the focus. The paper presents a parallel processing system based on 4 chips of TMS320C6701——high performance floating-point DSP of TI. The system accomplishes the communication between DSPs through the software-FIFO architecture in FPGA. |
| Keywords: | FPGA |
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