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Implementation of plug-and-play ESD protection in 5.5 GHz 90 nm RF CMOS LNAs—Concepts, constraints and solutions
Authors:S. Thijs   M.I. Natarajan   D. Linten   W. Jeamsaksiri   T. Daenen   R. Degraeve   Andries Scholten   S. Decoutere  G. Groeseneken  
Affiliation:1. IMEC, Kapeldreef 75, 3001 Leuven, Belgium;2. Department ELEC, Pleinlaan 2, Building K, 6th floor, Vrije Universiteit Brussel, 1050 Brussels, Belgium;3. TMEC (Thai Microelectronics Center), 51/4 Moo 1, Suwintawong Road, Wangtakian, Amphur Muang, Chachoengsao 24000, Thailand;4. Philips Research Laboratories Eindhoven, Building: WAY 4.39, Postbox WAY 41, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands;5. Electrical Engineering Department, Katholieke Universiteit Leuven, 3001 Leuven, Belgium;1. Department of Electrical Engineering and Computer Science, University of Central Florida, Orlando, FL 32826, USA;2. Corporate of ESD Department, Analog Devices, Inc., Wilmington, MA 01887-3462, USA;1. ICTEAM, Université catholique de Louvain, 1348 Louvain-la-Neuve, Belgium;2. Incize, Louvain-la-Neuve, Belgium;3. Soitec, Parc Technologique des Fontaines, 38190 Bernin, France;1. Microelectronics Dept., Electronics Research Institute (ERI), Giza, Egypt;2. Electronics and Communications Dept., Faculty of Engineering, Ain shams University, Cairo, Egypt;3. Electrical Engineering Department, Fayoum University, Fayoum, Egypt;4. Institute of Electronic Devices and Circuits, Ulm University, Ulm, Germany
Abstract:Design and implementation of ESD protection for a 5.5 GHz low noise amplifier (LNA) fabricated in a 90 nm RF CMOS technology is presented. An on-chip inductor, added as “plug-and-play”, is used as ESD protection for the RF pins. The consequences of design and process, as well as, the limited freedom on the ESD protection implementation for all pins to be protected are presented in detail. Enhancement in the ESD robustness using additional core-clamp diodes is proposed.
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