| 基于FPGA的CPCI高速读数接口设计 |
| |
| 引用本文： | 任勇峰,彭巧君,刘占峰.基于FPGA的CPCI高速读数接口设计[J].电子器件,2015,38(1). |
| |
| 作者姓名： | 任勇峰 彭巧君 刘占峰 |
| |
| 作者单位： | 中北大学仪器科学与动态测试教育部重点实验室，太原030051; 中北大学电子测试技术国家重点实验室，太原030051 |
| |
| 摘 要： | 针对提高读数测试设备实时准确接收、处理高速数据能力的问题，研究了基于FPGA的CPCI总线接口及LVDS高速数据接口。 CPCI总线接口和LVDS高速数据接口相结合，既提高了系统的处理速度，又满足了数字信号处理的实时性。经过大量的试验验证，该高速读数接口能够准确接收并实时处理大量的高速数据，具有很高的可靠性，并且已经应用到了实际工程当中。
|
| 关 键 词： | 读数接口 高速数据 CPCI总线 LVDS接口 |
Design of CPCI High Speed Reading Interface Based on FPGA |
| |
| REN Yongfeng,PENG Qiaojun,LIU Zhanfeng.Design of CPCI High Speed Reading Interface Based on FPGA[J].Journal of Electron Devices,2015,38(1). |
| |
| Authors: | REN Yongfeng PENG Qiaojun LIU Zhanfeng |
| |
| Abstract: | Aiming at issues of improving real-time and accurate receiving, processing high-speed data capability of it, the development and design of CPCI-bus interface and LVDS high-speed data interface based FPGA were studied in this paper. CPCI-bus interface and LVDS high-speed data interface, the combination of both improved the processing speed of the system, and satisfied the real time digital signal processing. After verification, the result showed that the reading interface was capable of real-time receiving and processing a large number of high-speed data and it has very high reliability. It has been applied to practical engineering. |
| |
| Keywords: | reading interface high-speed data CPCI-bus LVDS interface |
| 本文献已被 万方数据 等数据库收录！ |
| 点击此处可从《电子器件》浏览原始摘要信息 |
|
点击此处可从《电子器件》下载全文 |
