Emerging research memory and logic technologies |
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Authors: | Zhirnov V.V. Hutchby J.A. Bourianoff G.I. Brewer J.E. |
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Affiliation: | Semicond. Res. Corp., Durham, NC, USA; |
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Abstract: | The purpose of this article is to introduce a set of technology relevance or evaluation criteria and, based on these criteria, to offer a critical assessment of those technology entries for memory and logic being considered for post CMOS-scaling information processing. Additionally, charge-based nanoelectronic devices are discussed in this article separately from those approaches proposing use of a new means for data representation or "state variable." This separate discussion addresses an important question related to new charge-based information-processing approaches concerning the fundamental limits of an elemental switch (size, energy, speed, etc.). |
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