Silicon epitaxial growth using dichlorosilane

This paper describes the results obtained growing silicon epitaxial structures in a horizontal reactor using dichlorosilane as the silicon source material. The growth rate dependence upon temperature and dichlorosilane flux has been obtained for rates ranging from 1 μm/min to 20 μm/min for all major crystal orientations. Characterization was carried out using spreading resistance measurements, IR interference, preferential etching, and optical microscopy, for layer thicknesses ranging from 3 μm to 250 μm. The majority of the structures grown were multi-layered, intended for use in fabricating high voltage power transistors. Controlled doping levels over the range 5 × 10¹³ to 1 × 10¹⁷ were obtained using either AsH³ or B²Hg⁶ as the dopant source. The effect of growth parameters on the doping profile and quality of such layers is described. Operating devices fabricated from this material exhibit bulk avalanche breakdown voltage. Large area npn transistors with collector base voltages greater than 2000 volts and current gains of 10 to 30 have also been fabricated.