基于SynoTPys VMM方法的FPGA验证技术

针对可编程器件在数字系统设计领域日益显现的重要性,分析了基于现场可编程门阵列(FPGA)的硬件设计的质量保证方法,指出必须对FPGA设计进行充分的验证以提高相应产品的可靠性.从验证方法和方法学角度阐述了验证平台的发展趋势,比较了当前主流的验证方法学,基于Synopsys VMM方法提出并实现了一种层次化的通用验证技术,运用该技术搭建的验证平台已在工程实践中得到应用,验证结果表明,在保证平台通用性的同时提高了验证效率.

FPGA verification technology based on SynoTPys VMM

Field Programmable Gate Array(FPGA)designs should be thoroughly verified in order to enhance the reliability of corresponding product,with the emerging importance of programmable device in the field of implementation of digital system.The authors analyzed the methods for quality hardware design implemented on FPGA,depicted the trends of verification in terms of method and methodology,as well as conducted a comparison of mainstream verification methodologies.Based on SynoTPys Verification Methodology Manual(...