| 短稳提升装置的设计 |
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| 引用本文： | 沈世科. 短稳提升装置的设计[J]. 电子测试, 2020, 0(1): 31-32,34 |
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| 作者姓名： | 沈世科 |
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| 作者单位： | 中国西南电子技术研究所 |
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| 摘 要： | 设计了一种基于精密数字锁相环原理的短稳提升装置,用于提升铯原子频率标准的短期频率稳定度,扩展铯原子频率标准的适用范围。重点介绍了精密数字锁相环路设计的关键技术和解决方案。测试结果表明所设计的短稳提升装置达到预期指标要求。
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| 关 键 词： | 短期频率稳定度 数字锁相环 提升装置 |
Design of Short Frequency Stability Upgrading Device |
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| Shen Shike. Design of Short Frequency Stability Upgrading Device[J]. Electronic Test, 2020, 0(1): 31-32,34 |
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| Authors: | Shen Shike |
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| Affiliation: | (Southwest China Institute of Electronic Technology,Chengdu Sichuan,610036) |
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| Abstract: | Design a short frequency stability upgrading device based on precise digital phaselocked loop,used to upgrade short frequency stability of Cesium atom frequency standard,expand applicability of Cesium atom frequency standard.Describing the key technology and solution of designing precise digital phase-locked loop.The test result shows the specification of the upgrading device meets the requirements. |
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| Keywords: | short frequency stability digital phase-locked loop upgrading device |
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