Scalable 10 Gbit/s 4×20.25 μm CMOS/SIMOX ATM switch LSIcircuit based on distributed contention control |
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Authors: | Oki E. Yamanaka N. Okazaki K. Ohtomo Y. |
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Affiliation: | NTT Network Service Syst. Labs., Tokyo; |
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Abstract: | A scalable 10 Gbit/s 4×2 ATM switch LSI circuit has been fabricated. It employs a new distributed contention control technique that makes the LSI circuit expandable. To increase the LSI circuit throughput, 0.2 μm CMOS/SIMOX (separation by implanted oxygen) technology is used. It allows the LSI circuit to offer 221 I/O pins, an operating speed of 1.25 Gbit/s and 7 W power consumption |
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