用于3D封装的带TSV的超薄芯片新型制作方法

提出了一种应用于3D封装的带有硅通孔(TSV)的超薄芯片的制作方法。具体方法为通过刻蚀对硅晶圆打孔和局部减薄,然后进行表面微加工,最后从硅晶圆上分离出超薄芯片。利用两种不同的工艺实现了TSV的制作和硅晶圆局部减薄,一种是利用深反应离子刻蚀(DRIE)依次打孔和背面减薄,另一种是先利用KOH溶液湿法腐蚀局部减薄,再利用DRIE刻蚀打孔。通过实验优化了KOH和异丙醇(IPA)的质量分数分别为40%和10%。这种方法的优点在于制作出的超薄芯片翘曲度相较于CMP减薄的小,而且两个表面都可以进行表面微加工,使集成度提高。利用这种方法已经在实验室制作出了厚50μm的带TSV的超薄芯片,表面粗糙度达到0.02μm,并无孔洞地电镀填满TSV,然后在两面都制作了凸点,在表面进行了光刻、溅射和剥离等表面微加工工艺。实验结果证实了该方法的可行性。

New Method of Ultra-Thin Chip Fabrication with TSV for 3D Packaging

A fabrication method of the ultra-thin chip with through silicon via(TSV) for the 3D packaging was presented.The method was realized with fabricating the through silicon via(TSV) and locally selective thinning on the silicon wafer by etching firstly,then performing the surface micromachining,and finally deriving the ultra-thin chips from the wafer.Two approaches were utilized to achieve TSV fabrication and locally selective thinning on the silicon wafer.One was via fabrication then thinning by the deep reactive ion etching(DRIE),and the other one was thinning with the wet etching by the KOH solution then via formation by DRIE.The mass fractions of KOH and IPA are optimized to 40% and 10% with experiments,respectively.The advantage of the method is that the ultrathin chip fabricated by this way has little warping and two available planes for the surface micromachining can improve the integration of the 3D packaging. The ultrathin chip with 50 μm thickness and TSV was fabricated with 0.02 μm surfaceness and the TSV was filled with copper without holes.The bump fabrication on both sides of the ultra-thin chip and surface micromachining technology such as lithography,sputtering and stripping were completed.The experimental results verify the feasibility of the proposed method.