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A cellular automata guided two level obfuscation of Finite-State-Machine for IP protection
Affiliation:1. Universidade de São Paulo, ICMC, São Carlos, Brazil;2. Department of Computer Science, University of York, York YO10 5GH, UK;3. LRI, Univ. Paris-Sud, CNRS, Université Paris-Saclay, Orsay 91405, France;1. Institute of Solid State Physics, Russian Academy of Sciences, Chernogolovka, Russian Federation;2. Institute of Microelectronics Technology and High Purity Materials, Russian Academy of Sciences, Chernogolovka, Russian Federation;3. National Research Nuclear University MEPhI, Moscow, Russian Federation
Abstract:A popular countermeasure against IP piracy is to obfuscate the Finite State Machine (FSM) which is assumed to be the heart of a digital system. Most of the existing FSM obfuscation strategies rely on additionally introduced set of obfuscation mode state-transitions to protect the original state-transitions of the FSM. Although these methods assume that it is difficult to extract the FSM behavior from the flattened gate-level netlist, some recent reverse engineering attacks could successfully break the defense of these schemes. The capability of differentiating obfuscation mode state-transitions from normal mode state-transitions makes these attacks powerful. As a countermeasure against these attacks, we propose a new strategy that offers a key-based obfuscation to each state-transition of the FSM. We use a special class of non-group additive cellular automata (CA), called D1 1 CA, and it's counterpart D11CAdual to obfuscate each state-transition of the FSM. Each state-transition has its own customized key, which must be configured correctly in order to get correct state-transition behavior from the synthesized FSM. A second layer of protection to the state-transition logic enhances the security of the proposed scheme. An in-depth security analysis of the proposed easily testable key-controlled FSM synthesis scheme demonstrates its ability to thwart the majority of the state-of-the-art attacks, such as FSM reverse engineering, SAT, and circuit unrolling attacks. Thus, the proposed scheme can be used for IP protection of the digital designs. Experimentations on various IWLS′93 benchmark FSM designs show that the average area, power, and delay overheads our proposed multi-bit key-based obfuscated FSM design are 56.43%, 6.87%, and 23.41% while considering the FSMs as standalone circuits. However, experimentation on the Amber23 processor core shows these overheads drastically reduce (reported area, power, and delay overheads values are 0.0025%, 0.44%, and 0%, respectively) while compared with respect to the entire design.
Keywords:IP Piracy and counterfeiting  Reverse engineering  Finite-State-Machine obfuscation  Cellular automata  Logic encryption
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