| 多核SoC可扩展性设计技术研究 |
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| 引用本文： | 杜高明,张多利,汤益华. 多核SoC可扩展性设计技术研究[J]. 电子测量与仪器学报, 2008, 22(6) |
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| 作者姓名： | 杜高明 张多利 汤益华 |
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| 作者单位： | 合肥工业大学微电子设计研究所,合肥,230009 |
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| 基金项目： | 国家自然科学基金 ， 教育部高等学校博士学科点专项科研基金 ， 安徽省自然科学基金 |
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| 摘 要： | 近年来,使用多核SoC代替传统的单处理器系统,在提高系统并行性方面显示出了巨大的优势.本文在已有层次化总线结构MPSoC的基础上,研究多核SoC原型芯片可扩展性设计问题.在RTL级设计了上述平台,并用FPGA进行原型验证,以流水矩阵乘法为例研究其在不同工作负载下的加速比变化.实验结果表明,在6个处理器的情形下,循环次数为6次时加速比仅为4.10;随着循环次数增多,加速比可达5.48.研究表明多核层次化总线原型芯片的性能提升百分比以及面积增加百分比与处理器数目成正比.可以通过增加处理器的数目来提升MPSoC原型芯片的性能.
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| 关 键 词： | 多核SoC 原型芯片 可扩展性设计 双层总线 加速比 |
Research on Extensibility of Hierarchy Bus Based FPGA prototype for Multi-Processor System-on-Chip |
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| Du Gaoming,Zhang Duoli,Tang Yihua. Research on Extensibility of Hierarchy Bus Based FPGA prototype for Multi-Processor System-on-Chip[J]. Journal of Electronic Measurement and Instrument, 2008, 22(6) |
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| Authors: | Du Gaoming Zhang Duoli Tang Yihua |
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| Affiliation: | Du Gaoming Zhang Duoli Tang Yihua(VLSI Research Institute,Hefei University of Technology,Hefei 230009,China) |
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| Abstract: | In recent years,multi-processor system on chip(MPSoC) has become one of the mainstream design technologies in IC design field.Based on an existing in-house designed MPSoC,this paper focuses on the extensibility study of the hierarchy bus based MPSoC FPGA prototype.The MPSoC platform was implemented at RTL level,and on-chip communication architecture was extended from 4-cores to 6-cores.The extended MPSoC was implemented and verified on Altera FPGA.Qualitative experiments were carried out using pipelined-mat... |
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| Keywords: | Multi-Processor System on Chip(MPSoC) FPGA prototype scalable design hierarchy bus speed up. |
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