| 基于CORDIC算法的数字下变频 |
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| 引用本文： | 史磊,李婧,张怀武.基于CORDIC算法的数字下变频[J].太赫兹科学与电子信息学报,2009,7(3):227-229. |
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| 作者姓名： | 史磊 李婧 张怀武 |
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| 作者单位： | 1. 电子科技大学,电子薄膜与集成器件国家重点实验室,四川,成都,610054
2. 军械工程学院,图书馆,河北,石家庄,050003 |
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| 摘 要： | 采用CORDIC算法设计实现数字下变频（DDC）。该设计方法克服了传统的数控振荡器（NCO）查找表（LUT）大的缺点，且该算法模块同时实现数控振荡器和混频器的功能，省去了2个硬件乘法器。这种方法能够有效地提高信号处理效率，减小硬件实现的代价，通过仿真证明了该方法的有效性和高效性。最终实现的下变频模块可以工作在200MHz的系统时钟之下，占用FPGA资源约9％。
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| 关 键 词： | 下变频 数控振荡器 CORDIC算法 现场可编程门阵列 |
CORDIC algorithm-based digital down conversion |
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| SHI Lei,LI Jing,ZHANG Huai-wu.CORDIC algorithm-based digital down conversion[J].Journal of Terahertz Science and Electronic Information Technology,2009,7(3):227-229. |
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| Authors: | SHI Lei LI Jing ZHANG Huai-wu |
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| Affiliation: | SHI Lei, LI Jing, ZHANG Huai-wu (1.State Key Laboratory of Electronic Thin Film and Integrated Devices, UESTC, Chengdu Siehuan 610054, China; 2.Ordnance Engineering College Library, Shijiazhuang Hebei 050003, China ) |
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| Abstract: | A CORDIC algorithm-based Digital Down Conversion（DDC） method is introduced. This method overcomes the shortcoming of traditional Numerically Controlled Oscillator（NCO） that has a big look up table. This module combines NCO and MIXER together, which improves the efficiency of signal processing and reduces the cost of hardware implementation. The function and high efficiency is proved by the simulation. The CORDIC module could work at 200 MHz clock rates and occupies about 9% of the Field Programmable Gate Array（FPGA） resource. |
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| Keywords: | Digital Down Conversion Numerically Controlled Oscillator Coordinate Rotation Digital Computer Field Programmable Gate Array |
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