| 3WDSPl00高速链路口模块的设到 |
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| 引用本文： | 龚晓华,郭二辉,刘小明.3WDSPl00高速链路口模块的设到[J].中国集成电路,2012(3):60-64. |
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| 作者姓名： | 龚晓华 郭二辉 刘小明 |
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| 作者单位： | 中国电子科技集团第38研究所,合肥,230031 |
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| 摘 要： | 本文介绍了BWDSPl00芯片的高速互联接口——链路口的实现方法，功能验证结果表明，模块功能覆盖率和代码覆盖率均达到100％，符合设计要求。同时给出了流片后BWDSPl00芯片和FPGA链路口互联测试结果，结果表明300MHz下模块功能正确且传输稳定可靠。
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| 关 键 词： | 链路 IP 异步互联协议 |
Design of a high-speed Link port for BWDSPIO0 |
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| GONG Xiao-hua,GUO Er-hui,LIU Xiao-ming.Design of a high-speed Link port for BWDSPIO0[J].China Integrated Circuit,2012(3):60-64. |
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| Authors: | GONG Xiao-hua GUO Er-hui LIU Xiao-ming |
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| Affiliation: | (CETC No.38 Research Institute,Hefei,230031,China) |
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| Abstract: | In this article we propose a method to design a high-speed Link port for BWDSP100. First the architecture of DSP is introduced, then the implementation of Link port is discussed in detail, including the configure registers and the transport protocols, and a hardware architecture is presented next. Finally, results of function simulation and FPGA verification is given, which indicate that the design can be worked correctly and steadily at 300MHz. |
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| Keywords: | Link port IP Asynchronous transport protocols |
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