| 基于FPGA的可复用SPI总线实现 |
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| 引用本文： | 郭林,刘文杰,李跃辉,孙玲. 基于FPGA的可复用SPI总线实现[J]. 中国集成电路, 2012, 0(4): 34-37 |
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| 作者姓名： | 郭林 刘文杰 李跃辉 孙玲 |
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| 作者单位： | 南通大学江苏省专用集成电路设计重点实验室,江苏南通,226019 |
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| 摘 要： | SPI协议以其协议简单、通信速度快的特点正得到越来越广泛的应用。本文根据SPI总线标准,采用可综合的Verilog HDL语言完成了一种工作模式为SPI0的接口电路设计,并基于FPGA实现了这种高速可复用的SPI总线硬件电路。实验测试结果表明,该SPI总线接口满足实际应用需求。
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| 关 键 词： | SPI接口 串行 Verilog HDL FPGA |
Design of A Reusable SPI Bus Using FPGA |
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| GUO Lin,LIU Weng-jie,LI Yue-hui,SUN Ling. Design of A Reusable SPI Bus Using FPGA[J]. China Integrated Circuit, 2012, 0(4): 34-37 |
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| Authors: | GUO Lin LIU Weng-jie LI Yue-hui SUN Ling |
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| Affiliation: | (Jiangsu Key Lab of ASIC Design,Nantong University,Nantong 226007,China) |
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| Abstract: | SPI protocol with its simple rules and fast communication speed characteristics is getting more and more widely used.In this paper,according to the standard of SPI bus,a mode of SPI0 interface circuit design is proposed by using the comprehensive Verilog HDL language and the corresponding handware circuit is completed on the FPGA.The test results show that the designed SPI bus interface meets the practical application requirements. |
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| Keywords: | SPI Interface Serial Verilog HDL FPGA |
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