| 基于DMA的并行数字信号高速采集系统 |
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| 引用本文： | 王俊,郑焱,王红,杨士元. 基于DMA的并行数字信号高速采集系统[J]. 电子技术应用, 2010, 36(3) |
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| 作者姓名： | 王俊 郑焱 王红 杨士元 |
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| 作者单位： | 清华大学自动化系,北京,100084 |
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| 摘 要： | 本系统采用基于FPGA的DMA技术高速缓存多路并行数据,通过数据重组将数据有序发送给处理系统,用于数据的显示与分析。系统采用了嵌入式技术,达到了便携效果,从而更好地适应设备的工作环境。并行数字信号采集实验结果表明,系统能以5MHz、2.5MHz、500kHz、50Hz4档采样频率进行62路并行数字信号采集,各路采集结果正确,并保存了各路之间的同步信息。
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| 关 键 词： | DMA 并行高速采集 FPGA 嵌入式系统 |
DMA-based high-speed parallel acquisition system of digital signals |
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| WANG Jun,ZHENG Yan,WANG Hong,YANG Shi Yuan. DMA-based high-speed parallel acquisition system of digital signals[J]. Application of Electronic Technique, 2010, 36(3) |
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| Authors: | WANG Jun ZHENG Yan WANG Hong YANG Shi Yuan |
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| Affiliation: | WANG Jun,ZHENG Yan,WANG Hong,YANG Shi Yuan (Department of Automation,Tsinghua University,Beijing 100084,China) |
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| Abstract: | The proposed FPGA-based system uses DMA technology to cache multi-channel parallel data, and to send data to processing system orderly after data re-organization for display and analysis. Embedded technology is used to make system portable for operation environment of electronic equipment. Parallel digital signal acquisition experiment result shows that this system can acquire 62 channel digital signals correctly and synchronously at four gear sampling frequency of 5 MHz, 2.5 MHz, 500 kHz, and 50 Hz. |
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| Keywords: | DMA FPGA DMA high-speed parallel acquisition FPGA embedded system |
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