| 基于FPGA的数字示波器 |
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| 引用本文： | 董祥雷,王中训,胡小赫,刘建英.基于FPGA的数字示波器[J].现代电子技术,2010,33(24):7-9. |
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| 作者姓名： | 董祥雷 王中训 胡小赫 刘建英 |
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| 作者单位： | 烟台大学光电信息科学技术学院; |
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| 基金项目： | 山东省自然科学基金资助项目 |
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| 摘 要： | 提出一种基于FPGA的简易数字示波器设计方法,硬件上采用以Altera公司的EP2C8Q208CN现场可编程门阵列芯片作为核心器件,同时结合FPGA和NIOS软核的优势,设计高效的片上可编程系统（SoPC）对高速A/D所采集的数据进行快速存储和处理。整机测试表明,系统各功能正常,整个系统集成度高,体积小,可靠性高,易于程控,使用灵活。
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| 关 键 词： | 现场可编程逻辑门阵列 信号调整 高速A/D 片上可编程系统 |
Design and Implementation of Digital Oscilloscope Based on FPGA |
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| DONG Xiang-lei,WANG Zhong-xun,HU Xiao-he,LIU Jian-ying.Design and Implementation of Digital Oscilloscope Based on FPGA[J].Modern Electronic Technique,2010,33(24):7-9. |
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| Authors: | DONG Xiang-lei WANG Zhong-xun HU Xiao-he LIU Jian-ying |
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| Affiliation: | DONG Xiang-lei,WANG Zhong-xun,HU Xiao-he,LIU Jian-ying(Institute of Science and Technology for Opto-Electronics Information,Yantai University,Yantai 264005,China) |
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| Abstract: | A design method of digital oscilloscope based on FPGA is proposed,in which the hardware adopts Altera Corporation's EP2C8Q208CN field programmable gate array chip.With the advantages of FPGA and NIOS soft nucleus,an effective SoPC(on piece programmable system) was designed so as to quickly store and process the data collected by the high speed A/D.The integrated testing on the machine indicates that the whole system has advantages of high integration,small volume,light weight,high reliability,flexible and i... |
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| Keywords: | FPGA signal conditioning high speed A/D SoPC |
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