基于FPGA的HDB3编解码电路的实现

为了满足无线信道中传输码型无直流分量、较少低频分量,以及便于提取定时信息和具有检错能力等要求,选择了三阶高密度双极性码(HDB3).介绍了HDB3码的编解码原理,分析了HDB3码较其它码型所具有的优势,结合可编程逻辑器件集成度高,速度快,功耗低的特点,选用ALTERA公司的Cyclone系列FPGA芯片EP1C3T100进行HDB3编解码电路的实现.通过仿真,观察到电路各点的仿真输出波形与HDB3码的理论输出值一致.该方法可满足实际的通信系统传输要求,具有实际应用价值.

Encoder Circuits Implementation of HDB3 Basing on FPGA

In order to meet demands in the wireless transmission system, e g.no direct current, less low frequence spectrum ,picking-up timing signal easily, and capable to correct itself, choose high density binary-3 (HDB3) code. Introduce the encoder principle and analyse the advantages of HDB3. Then, basing Field Programmable Gate Array (FPGA), Cyclone EP1C3T100 of ALTERA.inc, implement the encoder circuits of HDB3. Through simulating, it have been found that output wave from simulating circuits are according with the encoder theory. This method can apply to the communication transmission system.