| 二级运放建立时间与相位裕度的分析与优化 |
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| 引用本文： | 陈泽强,李章全,潘瑞雪. 二级运放建立时间与相位裕度的分析与优化[J]. 信息技术, 2008, 32(9) |
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| 作者姓名： | 陈泽强 李章全 潘瑞雪 |
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| 作者单位： | 上海交通大学微电子学院,上海,200240 |
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| 摘 要： | 提出了一种分析两级运算放大电路建立时间和相位裕度的方法.该方法主要是通过对二级运算放大器的小信号分析,找出建立时间与相位裕度的关系,然后通过计算机仿真得出最短建立时间的相位裕度.仿真结果显示,在相位裕度为55.2°～72.85°时,建立时间能够取到最小值.最后,在已知最优化相位裕度的基础上,得出补偿电容CC的关系式,从而可以更好更方便地去设计两级运算放大器.
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| 关 键 词： | 两级运放 建立时间 相位裕度 补偿电容 最优化 |
Analysis and optimization of settling time and phase margin of two stages operational amplifier |
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| CHEN Ze-qiang,LI Zhang-quan,PAN Rui-xue. Analysis and optimization of settling time and phase margin of two stages operational amplifier[J]. Information Technology, 2008, 32(9) |
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| Authors: | CHEN Ze-qiang LI Zhang-quan PAN Rui-xue |
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| Affiliation: | CHEN Ze-qiang,LI Zhang-quan,PAN Rui-xue(School of Microelectronics,Shanghai Jiaotong University,Shanghai 200240,China) |
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| Abstract: | This paper introduces a method which can help us to analyze the settling time and phase margin of two stages operational amplifier.The theory of this method is mainly about that use small signal to analyze the two stages op-amp and find out the relationship between settling time and phase margin.Then,using computer simulation to calculate the optimal phase margin with the minimum settling time.The simulation result shows that the minimums settling time achieves when the phase margin is 55.2 to 72.85 degree.... |
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| Keywords: | two stages op-amp settling time phase margin compensation capacitor optimization |
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