| SM8260 Cache应用验证的性能测试分析 |
| |
| 引用本文： | 钟华,谭敏生,罗杨,胡小龙. SM8260 Cache应用验证的性能测试分析[J]. 计算机工程, 2010, 36(13): 211-212,215 |
| |
| 作者姓名： | 钟华 谭敏生 罗杨 胡小龙 |
| |
| 作者单位： | 1. 南华大学计算机科学与技术学院,衡阳,421001
2. 中南大学信息科学与工程学院,长沙,410083 |
| |
| 摘 要： | 根据CPU芯片应用验证的方法，给出写通模式下SM8260 Cache应用验证的流程及其硬件平台设计。分析L1 Cache, L2 Cache的初始化过程，对写通模式下的SM8260 L1 Cache, L2 Cache进行基准测试和大数组操作测试。测试结果表明，在大数组情况下，使用L2 Cache在一定程度上可提高嵌入式通信系统的性能。
|
| 关 键 词： | 一级缓存 二级缓存 应用验证 性能测试 |
Performance Measurement Analysis of SM8260 Cache Application Validation |
| |
| ZHONG Hua,TAN Min-sheng,LUO Yang,HU Xiao-long. Performance Measurement Analysis of SM8260 Cache Application Validation[J]. Computer Engineering, 2010, 36(13): 211-212,215 |
| |
| Authors: | ZHONG Hua TAN Min-sheng LUO Yang HU Xiao-long |
| |
| Affiliation: | (1. School of Computer Science and Technology, University of South China, Hengyang 421001; 2. School of Information Science and Engineering, Central South University, Changsha 410083) |
| |
| Abstract: | According to the method of CPU chip application validation, this paper presents the test process and design of hardware platform used for SM8260 Cache application validation in write-through mode. It analyzes the initial process of SM8260 L1 Cache and L2 Cache, carries out benchmark tests and large array tests on write-through mode. Test results indicate that the use of L2 Cache can improve system performance in embedded system to some extent in the case of large array. |
| |
| Keywords: | L1 Cache L2 Cache application validation performance measurement |
| 本文献已被 维普 万方数据 等数据库收录！ |
| 点击此处可从《计算机工程》浏览原始摘要信息 |
|
点击此处可从《计算机工程》下载全文 |
|
