高速ADC接口技术最新进展

随着ADC采样速率和分辨率的持续提高,高速ADC的输出接口模块所需传输的数据率同步提高。传统的TTL和CMOS等数字接口逻辑已无法满足高速ADC的应用需求。为解决该类瓶颈限制问题,LVTTL、LVCMOS等优化的数字逻辑接口、更高速的差分串行LVDS、CML输出接口以及最近几年在光传输系统中所采用的Serdes接口均被运用于ADC输出接口。首先对上述运用于高速ADC的最新数据输出接口技术的原理进行了分析和讨论,其次重点介绍了该类接口技术在高速ADC产品中的具体应用,最后对该类接口技术的优劣进行了总结。

Latest Development in I/O Techniques for High Speed ADC

With the continual increase of the resolution and speed in high speed ADC, the output data-rate for the digital I/O block in high speed ADC has increased aggressively. Traditional digital logic such as TTL and CMOS cannot satisfy the I/O block requirements of high speed ADCs anymore. In order to overcome the bottleneck of I/O speed in high speed ADCs, optimized digital logic such as LVTTL and LVCMOS, differential output techniques such as LVDS and CML, and Serdes I/O block used in optical system are introduced in high speed ADCs. The basic principle of these high speed I/O techniques is introduced and analyzed. The applications of these high speed I/O techniques in high speed ADCs are introduced. The comparison of these high speed I/O techniques is discussed in the last.