Miller and noise effects in a synchronizing flip-flop

The effects of Miller coupling and thermal noise on a synchronizing flip-flop are described. Data on the metastability characteristics of the flip-flop are gathered and analyzed. True metastability is distinguished from the deterministic region. A worst case mean-time-between-failure bound is established. A simple and accurate test method is presented. A simple jamb latch was used with driving circuits of two different strengths to determine the role of input strength on T_m and τ. The flip-flop was fabricated on a 0.25-μm CMOS process