Deep-submicrometer channel design in silicon-on-insulator (SOI)MOSFET's |
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Authors: | Su LT Jacobs JB Chung JE Antoniadis DA |
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Affiliation: | Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA; |
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Abstract: | Short-channel effects in deep-submicrometer SOI MOSFET's are explored over a wide range of device parameters using two-dimensional numerical simulations. To obtain reduced short-channel effects in SOI over bulk technologies, the silicon film thickness most be considerably smaller than the bulk junction depth because of an additional charge-sharing phenomenon through the SOI buried oxide. The optimal design space, considering nominal and short-channel threshold voltage, shows ample design options for both fully and partially depleted devices, however, manufacturing considerations in the 0.1 μm regime may favor partially depleted devices |
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