| 双层芯片叠层封装的EDA仿真设计 |
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| 引用本文： | 王艳,张晓林.双层芯片叠层封装的EDA仿真设计[J].电子与封装,2007,7(11):5-8,17. |
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| 作者姓名： | 王艳 张晓林 |
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| 作者单位： | 北京航空航天大学电子信息工程学院,北京,100083;北京航空航天大学电子信息工程学院,北京,100083 |
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| 摘 要： | 三维封装技术是近几年正在发展的电子封装技术,它的实质是在X、Y平面的基础上进一步向Z方向发展的微电子高密度组装。文章介绍了芯片封装发展的历史、趋势和三维封装技术在半导体封装工业中所起的重要作用,给出了用Cadence公司先进的EDA软件AllegroPackageDesigner进行3D封装的设计流程和使用该软件实现双层芯片叠层封装的3D封装设计,并对芯片高速信号管脚的EDA设计方法加以了说明。
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| 关 键 词： | 三维封装技术 信号完整性 球栅阵列 |
| 文章编号： | 1681-1070（2007）11-0005-04 |
| 修稿时间： | 2007-05-11 |
The Design of A Stacked-die Packaging Using EDA Tools for Simulation |
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| WANG Yan,ZHANG Xiao-lin.The Design of A Stacked-die Packaging Using EDA Tools for Simulation[J].Electronics & Packaging,2007,7(11):5-8,17. |
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| Authors: | WANG Yan ZHANG Xiao-lin |
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| Affiliation: | School of Electronic and Information Engineering, Beihang University, Beijing 100083, China |
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| Abstract: | This paper introduces the developing and future trends of semiconductor packaging technology. It also points out that the 3D packaging technology has a wide and important role in the semiconductor packaging industry. A design flow of the 3D packaging is using allegro package designer which is an advanced EDA software of cadence corporation is presented. This software doing a stacked-die packaging design is used. The design method of high speed signal pin is also introduced. |
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| Keywords: | 3D packaging technology signal integrity BGA |
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