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高压槽型SOI LDMOS槽区设计的普适方法
引用本文:胡夏融,张波,罗小蓉,李肇基. 高压槽型SOI LDMOS槽区设计的普适方法[J]. 半导体学报, 2012, 33(7): 074006-4
作者姓名:胡夏融  张波  罗小蓉  李肇基
作者单位:电子科技大学电子薄膜与集成器件国家重点实验室,电子科技大学电子薄膜与集成器件国家重点实验室,电子科技大学电子薄膜与集成器件国家重点实验室,电子科技大学电子薄膜与集成器件国家重点实验室
摘    要:论文介绍了高压SOI槽型LDMOS不同槽介质,槽宽和槽深设计的普适方法。该方法考虑了击穿电压和导通电阻的折中关系。浅而宽的槽适合用高介电常数材料填充,深而窄的槽适合用低介电常数材料填充。论文还讨论了真空槽的情况。仿真结果表明由于器件总宽度的降低,采用低介电常数材料填充槽区可以获得更高的设计优值。

关 键 词:LDMOS  设计方法  SOI  高电压  沟槽  通用  低k电介质  介电常数
收稿时间:2012-01-10

Universal trench design method for a high-voltage SOI trench LDMOS
Hu Xiarong,Zhang Bo,Luo Xiaorong and Li Zhaoji. Universal trench design method for a high-voltage SOI trench LDMOS[J]. Chinese Journal of Semiconductors, 2012, 33(7): 074006-4
Authors:Hu Xiarong  Zhang Bo  Luo Xiaorong  Li Zhaoji
Affiliation:State Key laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,State Key laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,State Key laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China,State Key laboratory of Electronic Thin Films and Integrated Devices,University of Electronic Science and Technology of China
Abstract:The design method of high voltage SOI Trench LDMOS for various trench permittivity, width and depth is introduced in this paper. Universal method for efficient design is presented for the first time, taking the trade-off between breakdown voltage(BV) and specific on-resistance(Rs,on) into account. The high-k (relative permittivity) dielectric is suitable to fill a shallow and wide trench while the low-k dielectric is suitable to fill deep and narrow trench. The SOI LDMOS with vacuum trench in drift region is also discussed. Simulation results show the high FOM BV2/Rs,on can be achieved with a trench filled with a the low-k dielectric due to its shortened cell-pitch.
Keywords:SOI   Trench   Permittivity  RESURF   LDMOS  Breakdown voltage
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