Abstract: | Direct-coupled FET Logic(DCFL)is an important logic family for GaAs FET LSI circuits because of its simple structure and good speed/power performance. The conventional E/D DCFL is especially sensitive to tempera-ture shifts and has low yield, so an improved version of DCFL known as E/E logic is studied. The characteristics of DC, transient and temperature are ana-lyzed, simulated and compared for E/D and E/E logic,E/E logic has improved temperature performance. After optimum design,E/D and E/E DCFL circuit are fabricated with approximatly 100ps delay time per gate and 1mW power dissipation per gate. In addition,E/E logic offers improved yield. |