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Experience with a Hybrid Processor: K-Means Clustering
Authors:Maya Gokhale  Jan Frigo  Kevin Mccabe  James Theiler  Christophe Wolinski  Dominique Lavenier
Affiliation:(1) Los Alamos National Laboratory, Los Alamos, NM, USA;(2) IRISA–CNRS, Campus de Beaulieu, 35042 Rennes cedex, France
Abstract:We discuss hardware/software co-processing on a hybrid processor for a compute- and data-intensive multispectral imaging algorithm, k-means clustering. The experiments are performed on two models of the Altera Excalibur board, the first using the soft IP core 32-bit NIOS 1.1 RISC processor, and the second with the hard IP core ARM processor. In our experiments, we compare performance of the sequential k-means algorithm with three different accelerated versions. We consider granularity and synchronization issues when mapping an algorithm to a hybrid processor. Our results show that speedup of 11.8X is achieved by migrating computation to the Excalibur ARM hardware/software as compared to software only on a Gigahertz Pentium III. Speedup on the Excalibur NIOS is limited by the communication cost of transferring data from external memory through the processor to the customized circuits. This limitation is overcome on the Excalibur ARM, in which dual-port memories, accessible to both the processor and configurable logic, have the biggest performance impact of all the techniques studied.
Keywords:configurable system on a chip  CSOC  Excalibur  FPGA  k-means clustering  image processing
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