Design and Implementation of Memory Elements Using the Cutting Edge Silicene Based Technology |
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| Authors: | Bhatia Inderdeep Singh Randhawa Deep Kamal Kaur |
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| Affiliation: | 1.Department of Electronics and Communication Engineering, Guru Nanak Dev University, Regional Campus, Jalandhar, 144007, India
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| Abstract: | Silicon - Almost 50% of random logic power is consumed in System-on-chip (SOC) by the memory latch circuits. VLSI designers of high performance SOC are struggling to realise a performance rich and... |
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