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A Novel Approach to Investigate the Impact of Hetero-High-K Gate Stack on SiGe Junctionless Gate-All-Around (JL-GAA) MOSFET
Authors:Gupta  Abhinav  Rai  Sanjeev  Kumar  Nitish  Sigroha  Deepak  Kishore  Arunabh  Pathak  Varnika  Rahman  Ziya Ur
Affiliation:1.Department of Electronics Engineering, Rajkiya Engineering College Sonbhadra, Churk, 231206, India
;2.Department of Electronics & Communication Engineering, M.N.N.I.T.Allahabad, Prayagraj, 211004, India
;3.Department of Electronics & Communication Engineering, KIT, Kanpur, 208001, India
;
Abstract:Silicon - It is a well-known fact that the gate stacking is used to improve the electrostatic behavior of Si0.5Ge0.5 Junctionless Gate-All-Around (JL-GAA) MOSFETs. In gate stacking, the high-k...
Keywords:
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