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基于FPGA的实时测距雷达研究
引用本文:张伟锋,薛明华,李林琳. 基于FPGA的实时测距雷达研究[J]. 电子测量技术, 2007, 30(12): 152-153,157
作者姓名:张伟锋  薛明华  李林琳
作者单位:北京航空航天大学,北京,100083;北京航空航天大学,北京,100083;北京航空航天大学,北京,100083
摘    要:本文分析了脉冲积累对雷达回波信号信噪比的改善能力,并在此基础上研究设计了以FPGA为核心的数据采集和处理系统.FPGA控制ADC对中频回波信号进行高速数字采样,同时使用Altera的IP工具利用FPGA集成的大量高速RAM和逻辑单元设计了读写速度达200 MHz的高速双端口RAM,对采样数据进行多次数字积累,N个脉冲发射完成即可完成N次脉冲积累.该方案提高了回波信号信噪比,改善了雷达的测距性能,实时完成了目标距离的测量.通过仿真验证了方案的可行性.

关 键 词:雷达  现场可编程门阵列  测距  脉冲积累

Research of real-time ranging radar based on FPGA technology
Zhang Weifeng,Xue Minghua,Li Linlin. Research of real-time ranging radar based on FPGA technology[J]. Electronic Measurement Technology, 2007, 30(12): 152-153,157
Authors:Zhang Weifeng  Xue Minghua  Li Linlin
Abstract:Pulse accumulation is capable of improve the SNR of radar echo signal,on which basis a data acquisition and procession system with FPGA as the core is developed.By controlling ADC FPGA sample intermediate-frequency echo signal with high speed.A dual-port RAM capable of 200MHz read-write speed is designed with the abundant high speed RAM and LEs integrated by FPGA as well as the assistance of Altera IP tool.Sampling data are multi digital accumulated,N times pulse accumulation can be accomplished by N times of pulse transmitting.This solution can effectively improve the SNR of echo signal,ameliorate radar ranging performance and accomplish object distance measuring in real time.Simulation results verify the feasibility of this scheme.
Keywords:radar  FPGA  ranging  pulse accumulation
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