| 一种视频缩放插值算法的FPGA实现 |
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| 引用本文： | 樊凌雁,;徐向阳.一种视频缩放插值算法的FPGA实现[J].杭州电子科技大学学报,2014(4):93-97. |
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| 作者姓名： | 樊凌雁 ;徐向阳 |
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| 作者单位： | [1]杭州电子科技大学微电子研究中心,浙江杭州310018; [2]杭州士兰微电子股份有限公司设计所,浙江杭州310012 |
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| 基金项目： | 浙江省自然科学基金资助项目（LQ12F01001）; 浙江省教育厅科研资助项目（Y200803237） |
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| 摘 要： | 针对视频后处理信号,提出了一种视频缩放插值算法的FPGA硬件实现方案。实现过程中,插值系数采用矩阵形式存放,根据不同的设置,调用特定的系数矩阵,实现不同的缩放比例,在保证插值效果的同时,可支持多种分辨率的显示器输出。最后通过FPGA验证,满足视频图像缩放的要求。
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| 关 键 词： | 插值算法 视频缩放 视频后处理 |
A Scalar Algorithm for Video Signal on FPGA |
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| Affiliation: | Fan Lingyan, Xu Xiangyang (1. Microelectronics Research Institute, Hangzhou Dianzi University, Hangzhou Zhejiang 310018, China; 2. Desigh Center, Hangzhou Silan Microelectronics CO., LTD, Hangzhou Zhejiang, 310012, China) |
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| Abstract: | It is proposed that a scalar algorithm for video post processing signal on FPGA in this paper. In the process of realization, the interpolation coefficient matrix storage, according to the different settings, the coefficient matrix a particular call, to achieve different scaling, the interpolation effect at the same time, the display output can support multiple resolution. Finally, verified by FPGA, its computational speed is high can meet the requirements of video image scaling. |
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| Keywords: | scalar algorithm video scalar video post processing |
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