超高频RFID标签命令头解析模块设计

该文针对超高频RFIDISO 18000-6C标准,分析了移位寄存器解析方案的冗余状态,提出了采用有限状态机优化超高频RFID标签命令头解析面积的方法。采用Verilog HDL,通过设置6组命令,进行了常用方案和新提出方案逻辑门数量的对比,从而反应出标签芯片电路面积的变化。实验结果表明,当指令数量在12 32条之间时,用有限状态机解析命令头的电路面积比用移位寄存器解析的面积小15%33%。

Design of a Command Code Decoder for a UHF RFID Tag

After analyzing the excessive states of shift-register command code decoder, this paper presents a finite-state machine command code decoder targeting low area implementation for a passive UHF RFID tag processor, which compiles with ISO/IEC 18000-6C protocol. Both shift-register decoders and finite-state machine decoders are programmed with Verilog HDL, and decode 6 command groups respectively to verify area usage. When the quantity of commands is between 12 and 32, the flnite-state machine command code decoder occupies 15% to 33% less area, compared with shift-register command code decoder.