A 2.5-V 14-bit, 180-mW Cascaded Σ∆ ADC for ADSL2+ Application |
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Authors: | Teng-Hung Chang Lan-Rong Dung Jwin-Yen Guo Kai-Jiun Yang |
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Affiliation: | Nat. Chiao Tung Univ., Hsinchu; |
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Abstract: | This paper presents a sigma-delta (SigmaDelta) analog-to-digital converter (ADC) for the extended bandwidth asymmetric digital subscriber line application. The core of the ADC is a cascaded 2-1-1 SigmaDelta modulator that employs a resonator-based topology in the first stage, three tri-level quantizers, and two different pairs of reference voltages. As shown in the experimental result, for a 2.2-MHz signal bandwidth, the ADC achieves a dynamic range of 86 d 15 and a peak signal-to-noise and distortion ratio of 78 dB with an oversampling ratio of 16. It is implemented in a 0.25-mum CMOS technology, in a 2.8 mm2 active area including decimation filter and reference voltage buffers, and dissipates 180 mW from a 2.5-V power supply. |
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