A quasi-optimal scheduling of intermediate signatures for multiple signature analysis compaction testing schemes |
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Authors: | D Lambidonis V K Agarwal A Ivanov D Xavier |
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Affiliation: | (1) Radio Aids Group, Dept. 75, CAE Electronics Ltd., 8585 Cote de Liesse, Saint-Laurent, H4T 1G6 Montreal, Canada;(2) LogicVision, 1735 N. First Street, Suite 306, 95112 San Jose, CA;(3) Department of Electrical Engineering, University of British Columbia, 2356 Main Mall, V6T 1Z4 Vancouver, Canada;(4) Bell Northern Research, P.O. Box 3511 Station C, K1Y 4H7 Ottawa, Ontario |
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Abstract: | In this article, a strategy based on the use of intermediate signatures is proposed that enables the exact fault coverage of compact testing schemes to be determined in a feasible computation time. Two models to predict fault simulation time, a fault simulator dependent and independent model, are developed and used by a dynamic programming based algorithm to find the optimal scheduling of the signatures with respect to the total simulation time. Simulation results for both models are then presented demonstrating the feasibility of the proposed strategy.This work was supported in part by grants from the Natural Sciences and Engineering Research Council (NSERC) of Canada, the Canadian Microelectronics Corporation (CMC) and the British Columbia Advanced Systems Institute (B.C. A.S.I.). |
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Keywords: | Built-in self-test compact testing fault coverage fault simulation signature analysis multiple signature analysis |
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