| 分段式电流舵 D/A转换器抗di/dt噪声设计 |
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| 引用本文： | 陈中盟,姚若河.分段式电流舵 D/A转换器抗di/dt噪声设计[J].微电子学,2010,40(1). |
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| 作者姓名： | 陈中盟 姚若河 |
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| 作者单位： | 华南理工大学,电子与信息学院,广州,510640 |
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| 摘 要： | 设计了一个8位50MHzD/A转换器(DAC),采用5+3分段式电流舵差分输出结构,其中高5位采用温度计码方式译码,低3位采用二进制译码方式;从各电路模块设计结构上提高DAC抗di/dt噪声的能力;设计了一个低交叉点开关驱动电路,有效地降低了输出毛刺,减小了数字电路di/dt噪声的影响。采用VIS0.35μmCMOS工艺进行仿真,结果表明,微分非线性(DNL)和积分非线性(INL)均小于0.15LSB。
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| 关 键 词： | D/A转换器 电流舵 微分非线性 积分非线性 di/dt噪声 |
Anti-di/dt Noise Design for Current Steering D/A Converter |
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| CHEN Zhongmeng,YAO Ruohe.Anti-di/dt Noise Design for Current Steering D/A Converter[J].Microelectronics,2010,40(1). |
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| Authors: | CHEN Zhongmeng YAO Ruohe |
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| Affiliation: | School of Electronic and Information Engineering/a>;South China University of Technology/a>;Guangzhou 510640/a>;P.R.China |
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| Abstract: | An 8-bit 50 MHz digital-to-analog converter (DAC) was designed,in which 5+3 segmented current steering architecture with differential output was adopted.Five most significant bits were decoded with thermo code,and three least significant bits were binary weighted.Each module architecture in DAC was carefully designed to improve anti-di/dt noise capability.In addition,a low cross-point switch driver was also designed to reduce glitches and di/dt noise of the digital circuit.The digital-to-analog converter wa... |
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| Keywords: | D/A converter Current steering DNL INL di/dt noise |
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