Optimization Technique for Dynamic Reconfiguration of Programmable Analog/Digital Arrays |
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Authors: | Lech Znamirowski Olgierd A. Palusinski Cornel Reiser |
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Affiliation: | (1) Institute of Informatics, Silesian University of Technology, Ul. Akademicka 16, 44-100 Gliwice, Poland;(2) Department of Electrical and Computer Engineering, University of Arizona, Tucson, AZ 85721, USA;(3) Institut für Theoretische Elektrotechnik und Messtechnik, University of Karlsruhe, 76128 Karlsruhe, Germany |
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Abstract: | This paper presents an investigation of dynamically reconfigurable mixed-signal circuit constructed using a digital control system and the new technology of Field Programmable Analog Arrays (FPAA). A Motorola FPAA described in this paper can be used to build filters for analog signals as well as other kinds of analog applications implemented in switched capacitor technology (S/C-technology). The experimental studies described, take advantage of performance and programmability of the FPAA for filtering of an analog signal. The circuit structure is based on 2 parallel FPAA chips, analog multiplexer and multiplexer's control logic controlled by a digital system such as a PC or a Field Programmable Gate Array (FPGA). Dynamic reconfiguration is used in this system for adaptive filtering, or adaptive processing in general. Modeling and measurements of the transition behavior of the switching process between the 2 FPAA chips and analysis of limitations imposed by hardware imperfections will be presented. The experimental system assembled in this work is an excellent vehicle to learn about intricacies in performance of mixed-signal circuits and is used for verification of theoretical predictions and model validation/modification. |
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Keywords: | reconfigurable hardware mixed-signal circuits adaptive filtering field programmable analog arrays (FPAA) field programmable gate arrays (FPGA) |
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