Application of forward gated-diode R–G current method in extracting F–N stress-induced interface traps in SOI NMOSFETs

Application of the forward gated-diode recombination–generation (R–G) current method in extracting the F–N stress-induced interface traps in SOI NMOSFET devices has been demonstrated in this letter. This easy and accurate experimental method can directly give F–N stress-induced interface trap density from the measured R–G current peak of the gated-diode architecture. An expected power law relationship between the induced interface trap density and the accumulated stress time has been obtained. For the different stress time and the bias voltage, the stress experiments demonstrate the induced interface traps increase in a similar power law factor, 0.4, revealing the same generation mechanism of the interface traps.