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Solder joint reliability of a polymer reinforced wafer level package
Authors:Deok-Hoon Kim   Peter Elenius   Michael Johnson  Scott Barrett
Affiliation:Kulicke & Soffa––Flip Chip Division, 3701 E. University Drive, Phoenix, AZ 85034, USA
Abstract:Wafer level packages (WLPs) have demonstrated a very clear cost-advantage vs traditional wire-bond technologies, especially for small components that have a high number of dice and I/O per wafer. Ultra CSP® is a WLP developed by the Kulicke & Soffa Flip Chip Division (formally Flip Chip Technologies). Typical products utilizing the Ultra chip scale package (CSP) have 5×5 or less area arrays at 0.5 mm pitch. This relatively small array has been limited by the inherent solder joint reliability of WLPs. A much larger subset of higher I/O IC’s could benefit from WLPs provided that standard reliability requirements are achieved without the use of underfill.A new polymer reinforcement technology, “Polymer Collar WLP™”, has been developed by K&S Flip Chip Division. Polymer Collar WLP utilizes a polymer reinforcement structure surrounding the solder joint and it has demonstrated more than 50% increase in solder joint life in thermal cycling tests. The most attractive feature of the Polymer Collar WLP process is its simplicity. A simple replacement of the standard solder flux with Polymer Collar material during the solder attach process is all that is required. This simplicity makes Polymer Collar the most cost-effective solution for adding a polymer reinforcement structure to the solder joint. Other methods in use today require additional complex and costly manufacturing steps.This Polymer Collar WLP is expected to widen the WLP market to include larger arrays where the Ultra CSP did not have suitable solder joint reliability.
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