基于FPGA的高速通信系统研究

介绍了以FPGA为核心基于LVDS接口的高速通信系统。系统通过FPGA将并行输入的信号组成特定的串行帧格式，并用LVDS接口发送。电缆驱动器及接收均衡器芯片用于加强系统远距离数据传送的能力，以保证200m同轴电缆的数据传输。系统使用串行同步方式传输，接收端首先通过时钟恢复芯片从串行数据帧中提取同步时钟，然后接收串行数据帧并恢复原信号。系统灵活性强、稳定性高，单路传输逮度高达120Mb／s。

Study of High Speed Communication System Based on FPGA

A high-speed communication system based on LVDS technology by FPGA is introduced. A specific serial frame format composed of the parallel input signal through FPGA, is sent with LVDS interface. The ability of system＇s long-distance transmission is enhanced by the chip of cable driver and cable equalizer, which ensure the data transmission at 200 meters coaxial cable. The System uses serial synchronous transfer mode, the receiver extracts synchronous clock signal from serial data frame by clock recovery chip, then it receives serial frames and recovers original signals. This System has high flexibility and stability, and the data rate of one channel is up to 120Mbps.