| 基于硬件控制器的乱序执行抗差分功耗攻击AES芯片 |
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| 引用本文： | 俞波,李翔宇,陈聪,孙义和,乌力吉,张向民.基于硬件控制器的乱序执行抗差分功耗攻击AES芯片[J].半导体学报,2012,33(6):065009-8. |
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| 作者姓名： | 俞波 李翔宇 陈聪 孙义和 乌力吉 张向民 |
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| 作者单位： | Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China |
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| 基金项目： | supported by the National Natural Science Foundation of China（No.61006021）; the Beijing Natural Science Foundation（No. 4112029） |
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| 摘 要： | 本文描述了一款通过硬件控制器实现乱序执行以抵抗差分功耗攻击（DPA）的AES 芯片。
该芯片实现了高级加密标准（AES）中规定的加密和解密算法。芯片采用细粒度数据流结构，
动态发掘了算法中的字节粒度操作的并发性。文章提出了一个新颖的电路，暂存-匹配-转发
单元（HMF），作为乱序执行的基本控制结构，将并行的操作以乱序的方式执行。该芯片已
在中芯国际（SMIC）180 纳米工艺下流片。功能测试的结果表明，128 位密钥长度下加密一
组明文的平均功耗为19nJ，裸片面积为0.43mm2。芯片抗功耗攻击的能力通过一个实际攻击
平台进行了评估。实际测试结果表明，在乱序执行情况下，在64000 条样本功耗曲线下无法
识别正确密钥。和确定操作顺序的情况相比，本文提出的通过硬件控制器实现乱序执行的方
法将破解成本至少提高21 倍。
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| 关 键 词： | 随机控制 芯片制造 AES 阻力 硬件 政治 高级加密标准 差分功耗分析 |
| 收稿时间： | 12/5/2011 3:51:08 PM |
| 修稿时间： | 1/11/2012 9:37:45 PM |
An AES chip with DPA resistance using hardware-based random order execution |
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| Yu Bo,Li Xiangyu,Chen Cong,Sun Yihe,Wu Liji and Zhang Xiangmin.An AES chip with DPA resistance using hardware-based random order execution[J].Chinese Journal of Semiconductors,2012,33(6):065009-8. |
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| Authors: | Yu Bo Li Xiangyu Chen Cong Sun Yihe Wu Liji and Zhang Xiangmin |
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| Affiliation: | Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China;Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University, Beijing, 100084, China |
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| Abstract: | |
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| Keywords: | differential power analysis advanced encryption standard dataflow asynchronous design |
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