| 一种考虑自热效应的互连线缓冲器插入优化模型 |
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| 作者姓名： | Zhang Yan Dong Gang Yang Yintang Wang Ning Ding Yaoshun Liu Xiaoxian Wang Fengjuan |
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| 作者单位： | Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute,Xidian University |
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| 基金项目： | Project supported by the National Natural Science Foundation of China （No. 60606006）, the Key Science ＆ Technology Special Project of Shaanxi Province, China （No. 2011KTCQ01-19）, and the National Defense Pre-Research Foundation of China （No. 9140A23060111 ）. |
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| 摘 要： | Considering the self-heating effect,an accurate expression for the global interconnection resistance per unit length in terms of interconnection wire width and spacing is presented.Based on the proposed resistance model and according to the trade-off theory,a novel optimization analytical model of delay,power dissipation and bandwidth is derived.The proposed optimal model is verified and compared based on 90 nm,65 nm and 40 nm CMOS technologies.It can be found that more optimum results can be easily obtained by the proposed model.This optimization model is more accurate and realistic than the conventional optimization models,and can be integrated into the global interconnection design of nano-scale integrated circuits.
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| 关 键 词： | self-heating effect interconnection wire resistance per unit length optimal model very large scale integration |
| 修稿时间： | 6/9/2013 12:00:00 AM |
A novel interconnect optimal buffer insertion model considering the self-heating effect |
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| Zhang Yan,Dong Gang,Yang Yintang,Wang Ning,Ding Yaoshun,Liu Xiaoxian,Wang Fengjuan.A novel interconnect optimal buffer insertion model considering the self-heating effect[J].Chinese Journal of Semiconductors,2013,34(11):115004-6. |
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| Authors: | Zhang Yan Dong Gang Yang Yintang Wang Ning Ding Yaoshun Liu Xiaoxian and Wang Fengjuan |
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| Affiliation: | Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China;Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices, Microelectronics Institute, Xidian University, Xi'an 710071, China |
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| Abstract: | Considering the self-heating effect, an accurate expression for the global interconnection resistance per unit length in terms of interconnection wire width and spacing is presented. Based on the proposed resistance model and according to the trade-off theory, a novel optimization analytical model of delay, power dissipation and bandwidth is derived. The proposed optimal model is verified and compared based on 90 nm, 65 nm and 40 nm CMOS technologies. It can be found that more optimum results can be easily obtained by the proposed model. This optimization model is more accurate and realistic than the conventional optimization models, and can be integrated into the global interconnection design of nano-scale integrated circuits. |
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| Keywords: | self-heating effect interconnection wire resistance per unit length optimal model very large scale integration |
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