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Jitter characteristics of an on-chip voltage reference-locked time-to-digital converter
Authors:Ilkka Nissinen  Juha Kostamovaara
Affiliation:(1) Department of Electrical and Information Engineering, Electronics Laboratory, University of Oulu, P.O.Box 4500, 90014 Oulu, Finland
Abstract:The noise and jitter characteristics of an on-chip voltage reference-locked ring oscillator used in the time-to-digital converter (TDC) of the integrated receiver of a pulsed time-of-flight laser rangefinder are presented. The frequency of the ring oscillator, 683 MHz, was locked to the on-chip voltage reference by means of a frequency-to-voltage converter, resulting in better than 90 ppm/°C stability. The noise and jitter transfer characteristics of the loop were derived, and simulations were performed to see the effects of different noise types (white and 1/f noise) on the cumulative jitter of the locked ring oscillator. Finally, these results were verified by jitter measurements performed using an integrated time-to-digital converter (TDC) fabricated on the same die (0.18 μm CMOS process). The cumulative jitter of the on-chip reference-locked ring oscillator was less than 30 ps (sigma value) over a time range of 70 ns, which made it possible to use this oscillator as the heart of a TDC when aiming at centimetre-level precision (1 cm = 67 ps) in laser ranging.
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