基于FPGA的简易逻辑分析仪

在嵌入式开发调试中，逻辑分析仪可以很好地辅助开发人员进行断点、触发和跟踪等调试。本设计应用FPGA（现场可编程门阵列）芯片和Verilog硬件描述语言设计8位简易逻辑分析仪，在模拟示波器上显示可移动的时间标志线，并采用LED（发光二极管）显示时间标志线所对应时刻的8路输入信号逻辑状态。系统以FPGA为控制核心，实现了FPGA与单片机的双工串行通信、触发控制、数据采集存储和示波器显示等功能。系统工作稳定可靠，测量结果准确无误。

A Simple Logic Analyzer Based on FPGA

The logic analyzer can be a good assistant to help the development engineer carry out operations of breakpoint, trigger and tracking debugging in the development of embedded debugging. Our design of simple logic analyzer with 8 signal channels is based on FPGA chips and Verilog HDL. It can display a mobile line as mark of time line on the analog oscilloscope and show the current 8 input logic states corresponding to the time line with LED. The key part of control is FPGA, and the system achieved duplexed communication between the FPGA and singlechip, trigger control, data acquisition and storage oscilloscope display, etc. The designed system is stable and reliable, and t results are accurate.