| 基于LVDS的高速数字信号源设计 |
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| 引用本文： | 王金雷,王刚.基于LVDS的高速数字信号源设计[J].机械制造与自动化,2012,41(2):116-117,137. |
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| 作者姓名： | 王金雷 王刚 |
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| 作者单位： | 中北大学,山西太原,030051 |
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| 摘 要： | 针对高速数字信号的发生问题,设计了一种基于FPGA时序控制和LVDS传输的数字信号源,它以FPGA作为控制核心,以并转串芯片DS92LV1023实现LVDS信号的传输,它以600 Mbps/s的速度传输,以双绞线作为传输介质,传输距离120m.本设计已成功运用在某地面匹配装置测试台信号源卡的设计中.
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| 关 键 词： | 高速数字信号 时序控制 传输数字信号源 |
Design of High-speed Digital Source Based on LVDS |
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| WANG Jin-lei
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WANG Gang.Design of High-speed Digital Source Based on LVDS[J].Machine Building & Automation,2012,41(2):116-117,137. |
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| Authors: | WANG Jin-lei WANG Gang |
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| Affiliation: | (North University of China,Taiyuan 030051,China) |
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| Abstract: | Aiming at the problem occuring in high-speed digital signal,this paper designs a digital signal source based on the timing system of FPGA and LVDS transmission.With FPGA as the core to control and twisted-pair cables as the transmission media,serializer chip DS92LV1023 is used to realize the signal transmission of LVDS at a speed of 600Mbps/s and propagation distance of 120m.The design is successfully used in the design of signal source card of test bench for matching device at some placl. |
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| Keywords: | high speed digital signal FPGA LVDS |
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